1. Field of the Invention
The present invention relates to an integrated circuit device having at least a central processing unit and a trace buffer and to its operation control method.
2. Description of the Related Art
Conventionally, an integrated circuit device has been used in various types of data processing. This type of integrated circuit has a central processing unit, such as a Central Processing Unit (CPU) core, which reads a program for execution of data processing.
When this type of integrated circuit is in the process of development, it is necessary to test the internal operation. one of the methods for testing the internal operation is tracing the behavior of the central processing unit. When performing the trace, an external memory containing a user program is connected to the external bus of the integrated circuit device with a debug device, such as an In-Circuit Emulator (ICE) system, connected to the debug interface (I/F) of the integrated circuit.
To do the test, the user program is read into the central processing unit for execution of data processing, and trace data generated by the central processing unit during execution of data processing is collected by the debug device. Checking the collected trace data, which is the execution history data on the central processing unit, shows how the central processing unit performed data processing during execution of the user program.
Because trace data need not be output to an external device when the integrated circuit device described above is used in a production run, the trace data is output via the debug interface provided for debugging purposes only. In addition, this debug interface is structured most simply because it is not used during a production run. That is, the debug interface is usually structured as a single serial port through which trace data is output serially.
As described above, connecting the debug device to the conventional integrated circuit device allows trace data to be collected from the central processing unit which executes data processing requested by the user program. Collected trace data is then used in checking the behavior of the central processing unit.
However, since trace data is output serially from one serial port of the integrated circuit device, some trace data collected by the debug device may be lost if trace data is generated faster than it is sent serially to the debug device. This happens more frequently when the speed at which central processing unit outputs trace data is not constant. In this case, the speed at which trace data is output by the central processing unit tends to instantaneously exceed the maximum speed at which trace data is sent from the serial port to the debug device.
In view of the foregoing, it is an object of the present invention to provide an integrated circuit device sending trace data generated by a central processing unit to a debug device without loss and a method of controlling the operation of the integrated circuit device.
According to one aspect of the present invention, there is provided an integrated circuit device comprising a central processing unit executing data processing in response to an interrupt signal and outputting trace data during execution; a trace buffer temporarily storing the trace data; a serial port used to output the trace data to an external unit; and a buffer monitoring circuit causing to suspend the data processing according to the usage amount of the trace buffer, wherein the trace buffer comprises means for detecting the amount of trace data that is input in parallel; means for converting the trace data from parallel to serial; and a plurality of shift registers sequentially storing the trace data that has been converted to serial; and wherein the buffer monitoring circuit comprises means for calculating, based on the detected amount of trace data, the number of shift registers to be used; means for outputting an interrupt signal to the processor according to the calculated number of shift registers; means for outputting rotate instruction data according to the calculated number of shift registers; and means for generating a shift/load signal for the plurality of shift registers according to the calculated number of shift registers.
With this invention, the central processing unit outputs trace data serially to the serial port during data processing. Therefore, connecting a debug device to the serial port allows a user to collect trace data. In this case, because the trace data is temporarily stored in the trace buffer, it is output to the serial port at a constant speed even when the central processing unit outputs the trace data at a speed that is not constant. When the amount of temporarily-stored trace data exceeds a maximum allowable amount that is predetermined, the central processing unit suspends data processing, thus making it possible to collect all trace data output by the central processing unit. In addition, this simply-structure device is capable of calculating the approximate usage amount of the trace buffer without having to monitor the trace buffer usage. And, this integrated circuit device converts from parallel to serial the trace data entered into the trace buffer and then sequentially stores the converted data into the plurality of shift registers, allowing the trace data from the central processing unit to be stored in the trace buffer efficiently.
According to another aspect of the present invention, there is provided a method of controlling an integrated circuit device comprising a central processing unit for outputting trace data, a trace buffer for temporarily storing the trace data, and a serial port for outputting the trace data to an external unit, the method comprising the steps of executing data processing in accordance with a program and outputting the trace data indicating an execution history; temporarily storing the trace data according to a usage amount of the trace buffer; and outputting the trace data temporarily stored in the trace buffer to the external unit via the serial port.
With this invention, the central processing unit outputs trace data serially to the serial port during data processing. Therefore, connecting a debug device to the serial port allows a user to collect trace data. In this case, because the trace data is temporarily stored in the trace buffer, it is output to the serial port at a constant speed even when the central processing unit outputs the trace data at a speed that is not constant. When the amount of temporarily-stored trace data exceeds a maximum allowable amount that is predetermined, the central processing unit suspends data processing, thus making it possible to collect all trace data output by the central processing unit.